DSP Basics
Digital signal processing (DSP) is what lets a small, inexpensive chip do jobs that once needed racks of analog hardware. A DSP chip or microcontroller applies mathematical operations to streams of numbers (the digitized signal) to filter, demodulate, cancel noise, compress, recognize and decode. Noise-cancelling headphones, phone calls, hearing aids, digital audio effects, smart speakers, modems, radar and medical monitors all depend on it.
A typical DSP receive chain. The ADC digitizes the signal at a high sample rate; subsequent stages decimate the sample rate down to the audio band while performing frequency translation, filtering, and demodulation — all in software.
View LargerThe DSP Processing Chain
A receiver DSP chain follows a standard sequence: the ADC samples the signal at a high rate, a digital anti-alias filter removes out-of-band noise, a digital mixer (NCO) shifts the desired signal to baseband, a low-pass FIR filter selects the desired signal bandwidth and rejects all others, a decimation stage reduces the sample rate to match the output bandwidth, and a demodulator extracts the audio or data. Each of these steps is performed by arithmetic on arrays of numbers.
The key insight is that digital processing can be reconfigured in software: changing the filter bandwidth, the demodulation mode, the decimation ratio, or the noise reduction algorithm requires only a software update, not new hardware. This is why software-based DSP tools — which expose the entire processing chain to the user — are so popular for experimentation.
Convolution and Filtering
In DSP, filtering is implemented as convolution: multiplying each incoming sample by a set of coefficients (called the filter's impulse response) and summing the results. The filter coefficients determine the filter's frequency response. A low-pass filter has coefficients shaped like a sinc function; a band-pass filter has coefficients shaped like a windowed sinusoid. The filter output at each sample time is a weighted sum of the current and past input samples:
y[n] = ∑k=0N-1 h[k] × x[n-k]
Where y[n] is the filter output at sample n, x[n-k] is the input sample k steps in the past, h[k] is the kth filter coefficient, and N is the number of taps (filter length). Each output sample requires N multiply-accumulate operations.
The number of coefficients (taps) determines the filter's sharpness. A 128-tap FIR filter can achieve very steep roll-off and flat passband — performance impossible to match with a practical analog filter. The price is computation: 128 multiply-accumulate operations for every output sample. At 48 kHz audio sample rate, a 128-tap filter requires 6.1 million multiply-accumulates per second — trivial for a modern DSP chip but significant for a microcontroller.
Multiply-Accumulate Hardware
DSP chips and FPGAs contain dedicated multiply-accumulate (MAC) units — hardware blocks that compute (A × B) + C in a single clock cycle. A typical DSP chip might contain 16 parallel MAC units, each operating at 200 MHz, giving 3.2 billion MACs per second. This dedicated hardware is what makes FIR filtering and FFT computation practical in real time.
Modern microcontrollers such as the ARM Cortex-M4 and M7 include a floating-point unit and SIMD (single instruction, multiple data) multiply-accumulate instructions, allowing audio and sensor DSP to run on low-cost embedded processors. Desktop software such as audio editors and GNU Radio uses the host computer's CPU, with vector instructions, to perform the same operations.
Decimation and Interpolation
Decimation reduces the sample rate by an integer factor M. Every M-th sample is kept; the others are discarded. Before discarding samples, a low-pass filter must be applied to prevent aliasing (the Nyquist rule applies at the new lower sample rate). The filter and decimation together are called a decimation filter. Decimation reduces the computational load on subsequent processing stages — a 10× decimation filter reduces a 480 kHz sample stream to 48 kHz before the audio demodulator, so the demodulator runs at 1/10th the computational cost.
Interpolation increases the sample rate by inserting new samples between existing ones (upsampling) and then low-pass filtering to remove images. Interpolation is used in DAC output paths and signal generators to increase the sample rate up to the DAC's operating rate. A two-stage interpolation of 10× followed by another 10× achieves 100× upsampling more efficiently than a single 100× stage.
CORDIC and Frequency Translation
Frequency translation (mixing) requires computing sine and cosine of the local oscillator frequency. In DSP, this is done with a Numerically Controlled Oscillator (NCO) — a counter that accumulates phase at a programmable rate and outputs sin/cos values. The sine and cosine outputs come from a lookup table or a CORDIC algorithm.
CORDIC (Coordinate Rotation Digital Computer) computes sin, cos, arctan, and related functions using only additions and bit shifts — no multipliers required. This makes CORDIC ideal for FPGAs and early DSP chips without hardware multipliers. The NCO generates two outputs (I and Q — in-phase and quadrature) that form a complex local oscillator. The incoming digitized signal is multiplied by the complex NCO output to shift the desired frequency to DC (baseband). This is the digital equivalent of the mixer stage in an analog superhet receiver.
DSP Applications
Noise reduction and cancellation. Noise-cancelling headphones measure ambient noise with microphones and generate an inverted copy to cancel it. Phone and video-call software analyzes the audio spectrum in real time and suppresses components that behave like noise while keeping speech.
Echo cancellation and equalization. Speakerphones and conferencing systems use adaptive filters to remove the echo of their own loudspeaker from the microphone signal. Room and speaker correction systems apply FIR filters that flatten a loudspeaker's response.
Communications. Modems, Wi-Fi, mobile phones and digital receivers perform filtering, demodulation, synchronization and error correction in DSP. The radio hardware only digitizes the signal; everything else is arithmetic.
Sensors and control. Digital filters remove noise from accelerometer, gyroscope and pressure readings; motor controllers run their control loops in DSP; and medical monitors filter mains hum out of ECG signals with a digital notch filter.
Frequently Asked Questions
What is the difference between a DSP chip and an FPGA for radio processing?
A DSP chip executes a sequential stream of instructions using dedicated MAC hardware — easy to program in C but limited in parallelism. An FPGA implements the processing pipeline as actual hardware logic running in parallel — much faster for tasks like FFT or FIR filtering, but harder to program (requires hardware description language like VHDL or Verilog). High-performance instruments use FPGAs for the initial high-sample-rate processing and a CPU or DSP for the final demodulation. Entry-level USB instruments push all processing to the host CPU.
Can DSP recover a signal that was clipped or aliased before it was digitized?
No. DSP can only work with the numbers it receives. If the analog signal was clipped because it exceeded the ADC's range, or if frequencies above the Nyquist limit were allowed through and folded into the band of interest, the information is already lost or corrupted, and no algorithm can reliably undo it. That is why the analog front end — gain setting, anti-alias filtering and a clean reference — still matters in a digital system. DSP can make a good signal better; it cannot repair a badly digitized one.
Test Your Knowledge
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