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Termination: Matched and Mismatched Loads

Every fast signal has the same goal: arrive at the far end of its cable or trace as a clean copy of what left the driver. That happens when the line is terminated — when the load at the end of the line, or the source at the start of it, presents the line's characteristic impedance so that reflections are absorbed instead of bouncing back and forth. When every part of the path has the same impedance the system is matched. When any part presents a different impedance, the system is mismatched, and part of each edge is reflected. Understanding what mismatch actually does to a signal, and how to choose and size a termination, is essential knowledge for anyone designing boards, running cables or debugging signals on an oscilloscope.

What you will learn: What a matched system looks like, the real effects of mismatch on signals, how series, parallel, Thevenin, AC and differential terminations work, how to calculate their values, what each costs in power and parts, and practical guidelines for choosing a termination.
Two diagrams. Top, matched: a 50 ohm signal generator, 50 ohm coax and a 50 ohm terminator at an oscilloscope input, with only a forward wave and a clean square edge at the scope. Bottom, mismatched: the same cable into an open 1 Mohm input, with forward and reflected waves and an edge showing overshoot and ringing

A matched line (top) carries only a forward wave and the edge arrives clean. An unterminated line (bottom) reflects each edge, producing overshoot and ringing. Termination makes a real circuit look like the top diagram.

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The Perfectly Matched System

A perfectly matched system is one where every part of the signal path presents the same resistive impedance to each adjacent part. The classic example is a signal generator connected to an oscilloscope:

  • The generator's output presents 50 ohms
  • The generator is connected to 50-ohm coaxial cable
  • The far end of the cable is connected to a 50-ohm load — the oscilloscope's 50 Ω input setting, or a 50 Ω feed-through terminator on its 1 MΩ input

In this ideal case, the generator delivers its rated output into the cable, the cable delivers all of it (minus its own small loss) to the load, and nothing is reflected. There are no standing waves on the cable — only a single forward-travelling wave — and a fast edge arrives at the scope with the same shape it had at the generator, simply delayed by the cable.

Video systems work the same way at 75 ohms, USB at 90 ohms differential, and Ethernet and HDMI at 100 ohms differential. A circuit board can be matched too: a driver, a 50-ohm trace and a 50-ohm termination form exactly the same system in miniature.

Notice that both ends do not always have to be matched. If either the source or the load is matched to the line, every reflection is absorbed at that end and the system settles cleanly. Terminating just one end — usually whichever is cheaper or uses less power — is the basis of most practical termination schemes.

What Mismatch Actually Does

A mismatched load at the end of a line creates a reflected wave. You already know how to calculate the size of that reflection from the impedances (the Reflection Coefficient and Return Loss lesson). The practical consequences depend on the kind of signal:

  • Overshoot and ringing on digital edges: A logic input is essentially an open circuit, so an unterminated line reflects the whole edge. The far end overshoots, rings, and settles only after several round trips. Overshoot stresses input protection diodes; ringing that crosses the logic threshold produces false clock edges and bit errors.
  • Steps and plateaus on long lines: On a cable much longer than the rise time, each reflection arrives as a separate step. Video shows this as ghost images; a TDR uses it on purpose to find faults.
  • Amplitude errors: The voltage at an unterminated far end is not the voltage the source intended. A 50-ohm signal generator set to 1 V into 50 Ω produces 2 V at an open end — a common source of confusion on the bench.
  • Less power delivered: For RF and power signals, the reflected fraction never reaches the load and must be absorbed or tolerated by the source.
  • More interference: Ringing adds high-frequency energy to the signal, and the standing waves on a mismatched cable make it radiate more effectively.

Series (Source) Termination

Series termination puts a resistor in series with the driver output, right at the driver, so that the driver's own output resistance plus the resistor equals Z₀:

Rseries = Z₀ − Rout
  • Rout = the driver's output resistance (from the datasheet, or estimated from its output current at a given voltage drop)
  • Place the resistor as close to the driver pin as possible

Here is how it works. The source resistance and the line form a voltage divider, so the step launched into the line is only half the full voltage. That half-height step travels to the open far end, where it reflects with Γ = +1 and doubles to the full voltage — exactly the voltage the receiver needs. The reflected half-step travels back to the source, where it meets a matched impedance and is absorbed. One round trip, no ringing.

Worked example — series termination for a clock line:

A 3.3 V clock driver has an output resistance of about 20 Ω. The trace is 50 Ω.

Rseries = 50 − 20 = 30 Ω → use the nearest standard value, 33 Ω.

Launched step: 3.3 × 50 / (20 + 33 + 50) = 1.60 V. At the open far end it doubles to 3.20 V, close to the full 3.3 V, and the small residual reflection from the slightly over-matched source (Γ = (53 − 50)/103 = +0.03) is negligible.

Series termination costs one resistor and no DC power, which makes it the most common termination for point-to-point CMOS signals: clocks, SPI and memory lines, and microcontroller outputs driving a single receiver. Its limitation is that the voltage is only correct at the far end. A receiver connected partway along the line sees the half-height step first and the full voltage only when the reflection passes back — a staircase edge that can be read incorrectly. Use series termination only when all receivers are at, or very close to, the far end.

Parallel (End) Termination

Parallel termination puts a resistor equal to Z₀ from the far end of the line to ground (or to another reference voltage). The line now ends in its own characteristic impedance, so nothing is reflected, and every receiver along the line sees a clean full-height edge as it passes.

Rparallel = Z₀, connected at the far end of the line, after the last receiver

The cost is power. The resistor is a DC load on the driver whenever the line is high. A 3.3 V signal into 50 Ω draws 66 mA and dissipates 218 mW — far more than most microcontroller and logic outputs can supply. Parallel termination is therefore used where the driver is designed for it: test equipment with 50 Ω outputs, video outputs (75 Ω), RF circuits, and logic families such as ECL that are built to drive terminated lines.

Thevenin (Split) Termination

Thevenin termination splits the parallel resistor into two: one from the line to the supply and one to ground. Their parallel combination equals Z₀, so reflections are still absorbed, but the line idles at a voltage between the rails and the driver only has to pull it partway up or down.

Worked example — Thevenin termination on a 3.3 V, 50 Ω line:

Choose R1 (to 3.3 V) = R2 (to ground) = 100 Ω. Parallel combination: 100 × 100 / 200 = 50 Ω — matched.

Idle voltage: 3.3 × 100 / 200 = 1.65 V. Standing current through the divider: 3.3 / 200 = 16.5 mA, all the time.

The driver now sources or sinks about (3.3 − 1.65) / 50 = 33 mA instead of 66 mA, but the termination draws current even when nothing is happening.

Thevenin termination is common on older parallel buses and memory interfaces. Modern designs often replace the divider with a single resistor to a dedicated termination supply (VTT, typically half the logic supply), which gives the same result with less wasted current.

AC (RC) Termination

AC termination puts a resistor equal to Z₀ in series with a capacitor at the far end of the line. At the instant an edge arrives, the uncharged capacitor looks like a short, so the line sees R = Z₀ and the edge is absorbed. Once the edge has passed, the capacitor charges and blocks DC, so the termination draws no steady current.

R = Z₀    C large enough that R × C ≥ about 3 × the round-trip delay (2T)
Worked example — AC termination for a 50 Ω line with 1 ns one-way delay:

Round-trip delay 2T = 2 ns. Required RC ≥ 3 × 2 ns = 6 ns.

C ≥ 6 ns / 50 Ω = 120 pF → use 150 pF with a 51 Ω resistor.

Check the other limit: the capacitor must also charge within a small part of the clock period. With RC = 51 × 150 pF = 7.7 ns, a 20 MHz clock (25 ns half-period) is fine; a much faster clock would need a smaller capacitor or a different termination.

AC termination suits clock lines, where the signal toggles continuously and the average DC level does not matter. It is a poor choice for data lines that can sit at one level for a long time, because the capacitor's charge shifts the effective threshold.

Differential Termination

A differential pair is terminated with a single resistor connected across the two wires at the receiver, equal to the pair's differential impedance. The two halves of the signal are equal and opposite, so the midpoint of the resistor is a virtual ground and each wire sees half the resistance — exactly its own single-ended impedance.

  • LVDS (displays, camera links, high-speed ADCs): 100 Ω across the pair at the receiver, often built into the receiver chip.
  • USB, HDMI, Ethernet: terminations are built into the interface chips; the board's job is to keep the traces at 90 or 100 Ω differential all the way to them.
  • RS-485 and CAN (long multi-drop buses): 120 Ω across the pair at each end of the bus, and nowhere else. Both ends are terminated because signals can be driven from any point on the bus and travel in both directions.

Choosing a Termination

Termination Parts DC Power Best For Watch Out For
Series (source) 1 resistor at the driver None Point-to-point CMOS: clocks, SPI, memory Receivers partway along the line see a staircase edge
Parallel (end) 1 resistor at the far end High Test equipment, video, RF, drivers built for it Most logic outputs cannot drive it
Thevenin (split) 2 resistors at the far end Moderate, continuous Multi-drop buses, older memory interfaces Wastes current even when idle
AC (RC) Resistor + capacitor at the far end None Clock lines Data patterns with long runs of 1s or 0s
Differential 1 resistor across the pair Low (set by the driver) LVDS, RS-485, CAN, high-speed serial RS-485 and CAN: both ends, never in between

Practical Termination Guidelines

Not every line needs termination. Use the critical-length rule from the Electrical Length lesson: if the line's one-way delay is less than about one-sixth of the rise time, reflections blend into the edge and termination is unnecessary. Slow buses such as I²C (rise times of hundreds of nanoseconds, set by the pull-up resistors) almost never need it; anything with edges of a few nanoseconds that leaves the immediate area of its driver probably does.

Some practical rules that come up again and again:

  • On the bench, terminate 50 Ω sources at the oscilloscope with a 50 Ω input setting or a feed-through terminator. Otherwise the scope shows twice the expected amplitude and ringing that is not in the circuit.
  • On boards, leave footprints for series resistors on fast outputs even if you start with 0 Ω links. Changing a resistor is much easier than redesigning a board.
  • Video outputs expect a 75 Ω load. A loop-through input on a monitor has a termination switch; only the last device in the chain should be terminated. An unterminated video line gives a picture that is too bright and may show ghost images; a double-terminated one is too dark.
  • RS-485 and CAN: check that there are exactly two 120 Ω terminators, one at each end of the bus. Measuring between the two data wires with the power off should read about 60 Ω.
  • Verify on the scope. Use a short ground spring on the probe, not the long ground lead, so that the ringing you see is in the circuit and not in your probe. Look at the signal at the receiver, not the driver.

Frequently Asked Questions

My oscilloscope shows ringing on a clock line. Is it the circuit or my probe?

It may well be the probe. A standard 10× probe with its 15 cm ground lead forms an LC circuit — the ground lead's inductance with the probe tip's capacitance — that rings at a few hundred megahertz whenever it sees a fast edge. Replace the ground lead with the short ground spring supplied with the probe and touch it to a ground point right next to the signal. If the ringing disappears, it was the probe. If it remains, measure at the receiving end of the line: ringing that is worst at the far end and shows a period of about four times the line delay is a reflection problem that termination will fix.

Why does a CAN or RS-485 bus need exactly two 120-ohm resistors?

The bus is a single long twisted pair with a differential impedance of about 120 ohms, and any node can transmit from any point along it. A signal launched in the middle travels toward both ends, so both ends need a matched termination to absorb it. Two 120-ohm resistors in parallel across the bus also set its DC load at 60 ohms, which is what the bus driver chips are designed to drive. Leaving one off produces reflections and errors on long buses; adding extra terminators at intermediate nodes lowers the load below 60 ohms, reduces the signal amplitude and can stop the bus working altogether.

Should I add a series resistor to every microcontroller output?

Not every output, but it is good practice on any output with fast edges that drives a trace longer than a few centimetres or leaves the board — clocks, SPI, fast GPIO and data lines. A 22–47 Ω series resistor at the pin damps reflections, slows the edges slightly (which reduces interference), and limits the current if the line is shorted or connected to the wrong voltage. On slow signals such as LED drivers, buttons and I²C, it is unnecessary. Many microcontrollers also let you reduce the output drive strength or slew rate in software, which achieves some of the same benefit.

Test Your Knowledge

Answer the questions below to check your understanding of this lesson. Every answer can be found in the lesson above.

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